# Panel Assembly Model Asset Implementation Plan

> **For agentic workers:** REQUIRED SUB-SKILL: Use superpowers:subagent-driven-development (recommended) or superpowers:executing-plans to implement this plan task-by-task. Steps use checkbox (`- [ ]`) syntax for tracking.

**Goal:** Generate a reusable electrical panel assembly asset as `.FCStd` and `.step`.

**Architecture:** Add one FreeCAD Python generator in `data/examples/qet_panel_assembly/`. The script bootstraps the registered Windows FreeCAD runtime, creates the panel assembly geometry, saves the FCStd, exports STEP, and writes a report used by verification.

**Tech Stack:** FreeCAD Python API, Part workbench primitives, registered QETDeps FreeCAD Python runtime, Markdown documentation.

---

### Task 1: Generator and README

**Files:**
- Create: `data/examples/qet_panel_assembly/create_qet_panel_assembly.py`
- Create: `data/examples/qet_panel_assembly/README.md`

- [ ] **Step 1: Create generator**

Create `create_qet_panel_assembly.py`. It must:

- Bootstrap Windows FreeCAD DLL paths from `QET_FREECAD_RUNTIME_JSON` or `%LOCALAPPDATA%\QETDeps\runtime.json`.
- Generate cabinet/door geometry, dark mounting plate, two white perforated connector banks, small white connector modules, and yellow wire frame geometry.
- Save `qet_panel_assembly.FCStd`.
- Export `qet_panel_assembly.step`.
- Write `qet_panel_assembly_report.json`.
- Avoid terminal LCS objects and engineering binding properties.

- [ ] **Step 2: Create README**

Create `README.md` describing dimensions, visual parts, output file roles, regeneration command, and the absence of terminal semantics.

### Task 2: Generate and Verify

**Files:**
- Generate: `data/examples/qet_panel_assembly/qet_panel_assembly.FCStd`
- Generate: `data/examples/qet_panel_assembly/qet_panel_assembly.step`
- Generate: `data/examples/qet_panel_assembly/qet_panel_assembly_report.json`

- [ ] **Step 1: Run generator**

Run:

```powershell
$runtime = Get-Content -LiteralPath 'C:\Users\ng123\AppData\Local\QETDeps\runtime.json' -Raw | ConvertFrom-Json
$env:QET_FREECAD_RUNTIME_JSON = 'C:\Users\ng123\AppData\Local\QETDeps\runtime.json'
& $runtime.freecad_python 'D:\LightWork3D\data\examples\qet_panel_assembly\create_qet_panel_assembly.py'
```

Expected: command exits `0` and prints generated output paths.

- [ ] **Step 2: Verify FCStd and STEP**

Open the FCStd with the registered FreeCAD Python runtime and assert:

- The document has objects.
- At least one object name starts with `Panel_`.
- At least one object name starts with `ConnectorBank_`.
- At least one object name starts with `WireFrame_`.
- No object has `Role="Terminal"`.
- No object has `QetProjectUuid`, `QetElementUuid`, `QetTerminalUuid`, or `QetInstanceId`.

Read the first line of the STEP file and assert it is `ISO-10303-21;`.

### Task 3: Commit

**Files:**
- Add: `docs/superpowers/plans/2026-05-27-panel-assembly-model-implementation.md`
- Add: `data/examples/qet_panel_assembly/`

- [ ] **Step 1: Stage intended files only**

Run:

```powershell
git add -- docs/superpowers/plans/2026-05-27-panel-assembly-model-implementation.md data/examples/qet_panel_assembly
git diff --cached --name-only
```

Expected: only the plan and `qet_panel_assembly` files are staged.

- [ ] **Step 2: Commit**

Run:

```powershell
git commit -m "feat: add panel assembly model asset"
```

Expected: a commit containing only the generated panel assembly asset files and plan.

## Self-Review

- Spec coverage: implements FCStd, STEP, generator, README, report, and semantic verification.
- Placeholder scan: no TBD/TODO/fill-later language is present.
- Type consistency: output file names match the approved spec.